1. Field of the Invention
Present invention relates to data detection apparatus and methods. It is in particular applicable to direct access storage (DASD) devices using partial-response (PR) signaling and maximum likelihood sequence detection (MLSD).
2. Background Information
In DASD systems as well as in data transmission systems, the signal read from the storage device or received at the output of a transmission channel has to be converted in the receiver into a sequence of symbols which most likely represents the data (symbol) sequence initially stored or transmitted by the sender, despite interference between adjacent symbols, and despite added noise.
The optimum receiver for detecting an uncoded data sequence in the presence of inter-symbol interference (ISI) and noise consists of a whitened-matched filter followed by a Viterbi detector which performs maximum likelihood sequence detection on the ISI trellis. In PRML (Partial-Response Maximum Likelihood) systems the composite noise at the input of the detector is not white, resulting in sub-optimal performance. This sub-optimality is more pronounced at high recording densities since the linear PR4 (PR class 4) equalizer tends to enhance the electronic noise component of the composite noise at the input of the PRML detector. In addition to colored noise, nonlinear distortion due to non-linear bit-shift and head asymmetry could further degrade performance of PRML systems.
International Patent Application PCT/WO97/11544 (IBM) discloses a scheme for data detection in a direct access storage device, called NPML (Noise-Predictive Maximum Likelihood detection), that arises by imbedding a noise prediction/whitening filter into the branch metric computation of the Viterbi detector. It has been shown via simulations that the NPML detectors offer substantial performance gains over the PRML detectors.
However, implementation of the imbedded predictor/whitener as a bank of finite-impulse-response (FIR) filters or equivalent table look-up operations, e.g. by means of random access memory (RAM), demands a certain level of complexity of the NPML hardware realization. A further difficulty with presently available implementation technologies is the time constraint imposed by high speed clock requirements.
Application of the Viterbi algorithm to channels represented by an IIR (Infinite Impulse Response) discrete-time equivalent model has been studied in a publication by A. Duel Hallen et al. xe2x80x9cDelayed decision-feedback sequence estimation,xe2x80x9d IEEE Trans. Commun., COM-37, pp.428-436, May 1989. The approach in that reference assumes a decision feedback equalization prefilter whose feedback filter is an IIR filter combined with Viterbi detection. In contrast, the present invention considers a forward partial-response or generalized partial-response linear equalizer and a noise whitening IIR predictor imbedded into the Viterbi detector.
It is a main object of present invention to provide a more efficient and simpler realization of the noise prediction/whitening mechanism for a NPML detector.
It is a further object of the invention to devise a partial-response maximum likelihood detection scheme that utilizes past decisions from the path memory of the Viterbi detector for the noise prediction process.
Another object of the invention is to enable additional mechanisms for a maximum likelihood detector which allow compensation of reading head asymmetries and of DC offset in the receiver.
The invention provides a partial-response signaling, maximum likelihood detector with an infinite impulse response (IIR) noise predictor and whitening filter imbedded in the Viterbi detector (INPML). As an additional feature, a DC (zero frequency) notch filter may be provided for DC offset compensation. Furthermore, an additional compensation method can be provided that is imbedded in the branch metric computation of the INPML detector for dynamic signal-asymmetry and DC offset compensation.
Advantages of the invention are that, besides its simplicity in implementation, it does not compromise performance of the detector. It has the further important advantage that it can be xe2x80x9cpiggy-backedxe2x80x9d on existing PRML systems so that there is no need for development and implementation of an entirely new channel architecture which would be a complex and costly task. The addition of a DC-notch filter or DC compensation method renders the INPML detector completely immune to DC offset, tolerant and robust against various types of non-linearity and in particular head asymmetry, and tolerant to thermal asperities, which is a further impairment in digital magnetic recording systems.
In the following, embodiments of the invention are described with reference to the drawings.